;****************************************************************************** ;* TMS320C6x ANSI C Codegen Version 4.09 Beta (Feb 8 2001) * ;* Date/Time created: Thu May 17 15:22:30 2001 * ;****************************************************************************** ;****************************************************************************** ;* GLOBAL FILE PARAMETERS * ;* * ;* Architecture : TMS320C671x * ;* Optimization : Enabled at level 3 * ;* Optimizing for : Speed * ;* Based on options: -o3, no -ms * ;* Endian : Little * ;* Interrupt Thrshld : Disabled * ;* Memory Model : Small * ;* Calls to RTS : Near * ;* Pipelining : Enabled * ;* Speculative Load : Disabled * ;* Memory Aliases : Presume are aliases (pessimistic) * ;* Debug Info : Debug * ;* * ;****************************************************************************** .asg A15, FP .asg B14, DP .asg B15, SP .global $bss .file "beauregardfft.c" .bss _WAngleIncrement,4,4 .sym _WAngleIncrement,_WAngleIncrement, 6, 3, 32 ; C:\TIBETA\C6000\CGTOOLS\BIN\opt6x.exe -v6710 -v6710 -O3 c:\windows\TEMP\TI677969_2 c:\windows\TEMP\TI677969_4 .sect ".text" .global _RealToComplex .sym _RealToComplex,_RealToComplex, 32, 2, 0 .func 193 ;****************************************************************************** ;* FUNCTION NAME: _RealToComplex * ;* * ;* Regs Modified : A0,A3,A4,B0,B4,B5,B6,B7 * ;* Regs Used : A0,A3,A4,A6,B0,B3,B4,B5,B6,B7 * ;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte * ;****************************************************************************** _RealToComplex: ;** --------------------------------------------------------------------------* .line 2 .sym _Y,4, 22, 17, 32 .sym _X,20, 24, 17, 32, $$fake0 .sym _logN,6, 4, 17, 32 .sym _Y,3, 22, 4, 32 .sym _X,0, 24, 4, 32, $$fake0 .sym _logN,21, 4, 4, 32 MV .D1 A4,A3 || MV .S2X A6,B5 || MV .S1X B4,A0 .line 8 MVK .S2 1,B4 ; |200| SHRU .S2 B4,B5,B5 ; |200| CMPGT .L2 B5,0,B0 ; |200| [!B0] B .S1 L4 ; |200| NOP 5 ; BRANCH OCCURS ; |200| ;** --------------------------------------------------------------------------* .line 10 MVC .S2 CSR,B6 ZERO .D2 B4 || AND .S2 -2,B6,B7 SUB .D2 B5,1,B0 || SUB .L2X A0,4,B5 || MVC .S2 B7,CSR ; interrupts off ;*----------------------------------------------------------------------------* ;* SOFTWARE PIPELINE INFORMATION ;* ;* Loop source line : 200 ;* Loop opening brace source line : 201 ;* Loop closing brace source line : 204 ;* Known Minimum Trip Count : 1 ;* Known Max Trip Count Factor : 1 ;* Loop Carried Dependency Bound(^) : 6 ;* Unpartitioned Resource Bound : 2 ;* Partitioned Resource Bound(*) : 2 ;* Resource Partition: ;* A-side B-side ;* .L units 0 0 ;* .S units 0 1 ;* .D units 2* 1 ;* .M units 0 0 ;* .X cross paths 0 0 ;* .T address paths 2* 1 ;* Long read paths 1 1 ;* Long write paths 0 0 ;* Logical ops (.LS) 0 0 (.L or .S unit) ;* Addition ops (.LSD) 0 1 (.L or .S or .D unit) ;* Bound(.L .S .LS) 0 1 ;* Bound(.L .S .D .LS .LSD) 1 1 ;* ;* Searching for software pipeline schedule at ... ;* ii = 6 Schedule found with 2 iterations in parallel ;* done ;* ;* Collapsed epilog stages : 0 ;* Collapsed prolog stages : 1 ;* Minimum required memory pad : 0 bytes ;* ;* Minimum safe trip count : 1 ;*----------------------------------------------------------------------------* ;* SETUP CODE ;* ;* SUB B5,4,B5 ;* ;* SINGLE SCHEDULED ITERATION ;* ;* C19: ;* LDW .D1T1 *A3++,A4 ; ^ |202| ;* NOP 4 ;* STW .D1T1 A4,*A0++(8) ; ^ |202| ;* || STW .D2T2 B4,*++B5(8) ; |203| ;* || [ B0] SUB .S2 B0,1,B0 ; |204| ;* [ B0] B .S2 C19 ; |204| ;* NOP 5 ;* ; BRANCH OCCURS ; |204| ;*----------------------------------------------------------------------------* L1: ; PIPED LOOP PROLOG ;** --------------------------------------------------------------------------* L2: ; PIPED LOOP KERNEL [ B0] B .S2 L2 ; |204| || LDW .D1T1 *A3++,A4 ; @ ^ |202| NOP 4 STW .D2T2 B4,*++B5(8) ; @|203| || STW .D1T1 A4,*A0++(8) ; @ ^ |202| || [ B0] SUB .S2 B0,1,B0 ; @|204| ;** --------------------------------------------------------------------------* L3: ; PIPED LOOP EPILOG ;** --------------------------------------------------------------------------* MVC .S2 B6,CSR ; interrupts on ;** --------------------------------------------------------------------------* L4: .line 13 B .S2 B3 ; |205| NOP 5 ; BRANCH OCCURS ; |205| .endfunc 205,000000000h,0 .sect ".text" .global _ComplexToReal .sym _ComplexToReal,_ComplexToReal, 32, 2, 0 .func 212 ;****************************************************************************** ;* FUNCTION NAME: _ComplexToReal * ;* * ;* Regs Modified : A0,A3,B0,B1,B4,B5,B6 * ;* Regs Used : A0,A3,A4,A6,B0,B1,B3,B4,B5,B6 * ;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte * ;****************************************************************************** _ComplexToReal: ;** --------------------------------------------------------------------------* .line 2 .sym _X,4, 24, 17, 32, $$fake0 .sym _Y,20, 22, 17, 32 .sym _logN,6, 4, 17, 32 .sym _X,0, 24, 4, 32, $$fake0 .sym _Y,20, 22, 4, 32 .sym _logN,22, 4, 4, 32 MV .D1 A4,A0 || MV .S2X A6,B6 .line 8 MVK .S2 1,B5 ; |219| SHRU .S2 B5,B6,B0 ; |219| CMPGT .L2 B0,0,B1 ; |219| [!B1] B .S1 L8 ; |219| NOP 5 ; BRANCH OCCURS ; |219| ;** --------------------------------------------------------------------------* .line 10 MVC .S2 CSR,B6 AND .S2 -2,B6,B5 MVC .S2 B5,CSR ; interrupts off ;*----------------------------------------------------------------------------* ;* SOFTWARE PIPELINE INFORMATION ;* ;* Loop source line : 219 ;* Loop opening brace source line : 220 ;* Loop closing brace source line : 222 ;* Known Minimum Trip Count : 1 ;* Known Max Trip Count Factor : 1 ;* Loop Carried Dependency Bound(^) : 7 ;* Unpartitioned Resource Bound : 1 ;* Partitioned Resource Bound(*) : 1 ;* Resource Partition: ;* A-side B-side ;* .L units 0 0 ;* .S units 1* 0 ;* .D units 1* 1* ;* .M units 0 0 ;* .X cross paths 0 1* ;* .T address paths 1* 1* ;* Long read paths 0 1* ;* Long write paths 0 0 ;* Logical ops (.LS) 0 1 (.L or .S unit) ;* Addition ops (.LSD) 0 1 (.L or .S or .D unit) ;* Bound(.L .S .LS) 1* 1* ;* Bound(.L .S .D .LS .LSD) 1* 1* ;* ;* Searching for software pipeline schedule at ... ;* ii = 7 Schedule found with 1 iterations in parallel ;* done ;* ;* Collapsed epilog stages : 0 ;* Collapsed prolog stages : 0 ;* ;* Minimum safe trip count : 1 ;*----------------------------------------------------------------------------* ;* SINGLE SCHEDULED ITERATION ;* ;* C56: ;* LDW .D1T1 *A0++(8),A3 ; ^ |221| ;* || [ B0] SUB .D2 B0,1,B0 ; |222| ;* [ B0] B .S1 C56 ; |222| ;* NOP 3 ;* MV .S2X A3,B5 ; ^ Define a twin register ;* STW .D2T2 B5,*B4++ ; ^ |221| ;* ; BRANCH OCCURS ; |222| ;*----------------------------------------------------------------------------* L5: ; PIPED LOOP PROLOG ;** --------------------------------------------------------------------------* L6: ; PIPED LOOP KERNEL [ B0] SUB .D2 B0,1,B0 ; |222| || LDW .D1T1 *A0++(8),A3 ; ^ |221| [ B0] B .S1 L6 ; |222| NOP 3 MV .S2X A3,B5 ; ^ Define a twin register STW .D2T2 B5,*B4++ ; ^ |221| ;** --------------------------------------------------------------------------* L7: ; PIPED LOOP EPILOG ;** --------------------------------------------------------------------------* MVC .S2 B6,CSR ; interrupts on ;** --------------------------------------------------------------------------* L8: .line 12 B .S2 B3 ; |223| NOP 5 ; BRANCH OCCURS ; |223| .endfunc 223,000000000h,0 .sect ".text" .global _BitReverse .sym _BitReverse,_BitReverse, 36, 2, 0 .func 172 ;****************************************************************************** ;* FUNCTION NAME: _BitReverse * ;* * ;* Regs Modified : A0,A3,A4,B0 * ;* Regs Used : A0,A3,A4,B0,B3,B4 * ;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte * ;****************************************************************************** _BitReverse: ;** --------------------------------------------------------------------------* .line 2 .sym _Number,4, 4, 17, 32 .sym _Places,20, 4, 17, 32 .sym _Reverse,0, 4, 4, 32 .sym _Number,3, 4, 4, 32 .sym _Number,0, 4, 4, 32 .sym _Places,20, 4, 4, 32 MV .D1 A4,A3 .line 6 ZERO .D1 A0 ; |177| .line 7 CMPGT .L2 B4,0,B0 ; |178| [!B0] B .S1 L12 ; |178| NOP 5 ; BRANCH OCCURS ; |178| ;** --------------------------------------------------------------------------* .line 9 SUB .D2 B4,1,B0 ;*----------------------------------------------------------------------------* ;* SOFTWARE PIPELINE INFORMATION ;* ;* Loop source line : 178 ;* Loop opening brace source line : 179 ;* Loop closing brace source line : 183 ;* Known Minimum Trip Count : 1 ;* Known Max Trip Count Factor : 1 ;* Loop Carried Dependency Bound(^) : 2 ;* Unpartitioned Resource Bound : 1 ;* Partitioned Resource Bound(*) : 2 ;* Resource Partition: ;* A-side B-side ;* .L units 0 0 ;* .S units 1 1 ;* .D units 0 0 ;* .M units 0 0 ;* .X cross paths 0 0 ;* .T address paths 0 0 ;* Long read paths 0 0 ;* Long write paths 0 0 ;* Logical ops (.LS) 2 0 (.L or .S unit) ;* Addition ops (.LSD) 1 1 (.L or .S or .D unit) ;* Bound(.L .S .LS) 2* 1 ;* Bound(.L .S .D .LS .LSD) 2* 1 ;* ;* Searching for software pipeline schedule at ... ;* ii = 2 Schedule found with 4 iterations in parallel ;* done ;* ;* Collapsed epilog stages : 3 ;* Collapsed prolog stages : 0 ;* Minimum required memory pad : 0 bytes ;* ;* Minimum safe trip count : 1 ;*----------------------------------------------------------------------------* ;* SINGLE SCHEDULED ITERATION ;* ;* C98: ;* [ B0] SUB .D2 B0,1,B0 ; |183| ;* [ B0] B .S2 C98 ; |183| ;* NOP 3 ;* AND .S1 1,A3,A4 ; |180| ;* || ADD .D1 A0,A0,A0 ; ^ ;* OR .L1 A0,A4,A0 ; ^ |180| ;* || SHR .S1 A3,1,A3 ; |182| ;* ; BRANCH OCCURS ; |183| ;*----------------------------------------------------------------------------* L9: ; PIPED LOOP PROLOG [ B0] B .S2 L10 ; (P) |183| [ B0] SUB .D2 B0,1,B0 ; (P) @|183| [ B0] B .S2 L10 ; (P) @|183| [ B0] SUB .D2 B0,1,B0 ; (P) @@|183| ;** --------------------------------------------------------------------------* L10: ; PIPED LOOP KERNEL ADD .D1 A0,A0,A0 ; ^ || AND .S1 1,A3,A4 ; |180| || [ B0] B .S2 L10 ; @@|183| SHR .S1 A3,1,A3 ; |182| || OR .L1 A0,A4,A0 ; ^ |180| || [ B0] SUB .D2 B0,1,B0 ; @@@|183| ;** --------------------------------------------------------------------------* L11: ; PIPED LOOP EPILOG ;** --------------------------------------------------------------------------* ;** --------------------------------------------------------------------------* L12: .line 13 .line 14 B .S2 B3 ; |185| MV .D1 A0,A4 ; |184| NOP 4 ; BRANCH OCCURS ; |185| .endfunc 185,000000000h,0 .sect ".text" .global _BitReverseArray .sym _BitReverseArray,_BitReverseArray, 32, 2, 0 .func 149 ;****************************************************************************** ;* FUNCTION NAME: _BitReverseArray * ;* * ;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,B0,B1,B2,B3,B4,B5, * ;* B6,B7,B8,B9,B10,SP * ;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,B0,B1,B2,B3,B4,B5, * ;* B6,B7,B8,B9,B10,SP * ;* Local Frame Size : 0 Args + 8 Auto + 12 Save = 20 byte * ;****************************************************************************** _BitReverseArray: ;** --------------------------------------------------------------------------* .line 2 .sym _X,4, 24, 17, 32, $$fake0 .sym _LogN,20, 4, 17, 32 .sym _N,17, 4, 4, 32 .sym _BitReverseCounter,4, 4, 4, 32 .sym _Counter,5, 4, 4, 32 .sym _X,10, 24, 4, 32, $$fake0 .sym _LogN,26, 4, 4, 32 .sym _Temp,4, 8, 1, 64, $$fake0 STW .D2T2 B10,*SP--(24) ; |150| STW .D2T2 B3,*+SP(20) ; |150| STW .D2T1 A10,*+SP(16) ; |150| MV .D2 B4,B10 || MV .D1 A4,A10 .line 8 INTSP .L2 B10,B4 ; |156| MVKL .S2 RL0,B3 ; |156| B .S1 _pow ; |156| ZERO .D1 A5 ; |156| MVKH .S2 RL0,B3 ; |156| SPDP .S2 B4,B5:B4 ; |156| ZERO .D1 A4 ; |156| MVKH .S1 0x40000000,A5 ; |156| RL0: ; CALL OCCURS ; |156| MVKL .S2 0x3f1a36e2,B5 ; |156| MVKL .S2 0xeb1c432d,B4 ; |156| MVKH .S2 0x3f1a36e2,B5 ; |156| MVKH .S2 0xeb1c432d,B4 ; |156| ADDDP .L2X B5:B4,A5:A4,B5:B4 ; |156| NOP 6 DPTRUNC .L2 B5:B4,B1 ; |156| NOP 3 CMPGT .L2 B1,0,B0 ; |156| [!B0] B .S1 L14 ; |156| NOP 5 ; BRANCH OCCURS ; |156| ;** --------------------------------------------------------------------------* .line 11 .line 9 ZERO .D1 A5 ; |157| ;*----------------------------------------------------------------------------* ;* SOFTWARE PIPELINE INFORMATION ;* Disqualified loop: loop contains a call ;*----------------------------------------------------------------------------* L13: .line 11 B .S1 _BitReverse ; |159| MVKL .S2 RL2,B3 ; |159| MVKH .S2 RL2,B3 ; |159| MV .D2 B10,B4 ; |159| MV .D1 A5,A4 ; |159| NOP 1 RL2: ; CALL OCCURS ; |159| .line 12 CMPGT .L1 A4,A5,A1 .line 14 [ A1] ADDAD .D1 A10,A5,A0 ; |162| [ A1] LDW .D1T1 *A0,A3 ; |162| [ A1] LDW .D1T1 *+A0(4),A6 ; |162| [ A1] ADD .D2 4,SP,B4 ; |162| NOP 2 [ A1] STW .D2T1 A3,*B4 ; |162| [ A1] STW .D2T1 A6,*+B4(4) ; |162| .line 15 [ A1] ADDAD .D1 A10,A4,A3 ; |163| [ A1] LDW .D1T1 *+A3(4),A4 ; |163| [ A1] LDW .D1T1 *A3,A6 ; |163| NOP 3 [ A1] STW .D1T1 A4,*+A0(4) ; |163| [ A1] STW .D1T1 A6,*A0 ; |163| .line 16 [ A1] ADD .D2 4,SP,B4 ; |164| [ A1] LDW .D2T2 *+B4(4),B5 ; |164| [ A1] LDW .D2T2 *B4,B4 ; |164| NOP 4 [ A1] STW .D1T2 B4,*A3 ; |164| [ A1] STW .D1T2 B5,*+A3(4) ; |164| .line 18 SUB .D2 B1,1,B1 ; |166| [ B1] B .S1 L13 ; |166| ADD .D1 1,A5,A5 ; |166| NOP 4 ; BRANCH OCCURS ; |166| ;** --------------------------------------------------------------------------* L14: .line 19 LDW .D2T2 *+SP(20),B3 ; |167| NOP 2 LDW .D2T1 *+SP(16),A10 ; |167| LDW .D2T2 *++SP(24),B10 ; |167| B .S2 B3 ; |167| NOP 5 ; BRANCH OCCURS ; |167| .endfunc 167,004080400h,24 .sect ".text" .global _BeauregardFFT .sym _BeauregardFFT,_BeauregardFFT, 32, 2, 0 .func 61 ;****************************************************************************** ;* FUNCTION NAME: _BeauregardFFT * ;* * ;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14, * ;* A15,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12, * ;* B13,SP * ;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14, * ;* A15,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12, * ;* B13,DP,SP * ;* Local Frame Size : 0 Args + 32 Auto + 44 Save = 76 byte * ;****************************************************************************** _BeauregardFFT: ;** --------------------------------------------------------------------------* .line 2 .sym _X,4, 24, 17, 32, $$fake0 .sym _LogN,20, 4, 17, 32 .sym _Direction,6, 4, 17, 32 .sym _WIm,0, 6, 4, 32 .sym _WRe,13, 6, 4, 32 .sym _angle,20, 6, 4, 32 .sym _XBotIm,4, 6, 4, 32 .sym _XBotRe,3, 6, 4, 32 .sym _XTopIm,6, 6, 4, 32 .sym _XTopRe,5, 6, 4, 32 .sym _WIndexStep,15, 4, 4, 32 .sym _WIndex,27, 4, 4, 32 .sym _N,14, 4, 4, 32 .sym _FFTSpacing,20, 4, 1, 32 .sym _FFTStart,28, 4, 1, 32 .sym _Span,16, 4, 1, 32 .sym _FliesPerFFT,26, 4, 4, 32 .sym _X,12, 24, 4, 32, $$fake0 .sym _LogN,4, 4, 1, 32 .sym _Direction,8, 4, 1, 32 STW .D2T2 B13,*SP--(80) ; |62| STW .D2T1 A15,*+SP(76) ; |62| STW .D2T2 B12,*+SP(72) ; |62| STW .D2T2 B11,*+SP(68) ; |62| STW .D2T2 B10,*+SP(64) ; |62| STW .D2T2 B3,*+SP(60) ; |62| STW .D2T1 A14,*+SP(56) ; |62| STW .D2T1 A13,*+SP(52) ; |62| STW .D2T1 A12,*+SP(48) ; |62| STW .D2T1 A11,*+SP(44) ; |62| STW .D2T1 A10,*+SP(40) ; |62| STW .D2T1 A6,*+SP(8) STW .D2T2 B4,*+SP(4) || MV .D1 A4,A12 .line 22 INTSP .L2 B4,B4 ; |82| MVKL .S2 RL4,B3 ; |82| B .S1 _pow ; |82| ZERO .D1 A5 ; |82| MVKH .S2 RL4,B3 ; |82| SPDP .S2 B4,B5:B4 ; |82| ZERO .D1 A4 ; |82| MVKH .S1 0x40000000,A5 ; |82| RL4: ; CALL OCCURS ; |82| MVKL .S2 0x3f50624d,B5 ; |82| MVKL .S2 0xd2f1a9fc,B4 ; |82| MVKH .S2 0x3f50624d,B5 ; |82| MVKH .S2 0xd2f1a9fc,B4 ; |82| ADDDP .L1X B5:B4,A5:A4,A1:A0 ; |82| NOP 6 DPTRUNC .L1 A1:A0,A14 ; |82| .line 24 LDW .D2T1 *+SP(8),A1 NOP 4 [ A1] B .S1 L15 ; |84| NOP 5 ; BRANCH OCCURS ; |84| ;** --------------------------------------------------------------------------* .line 25 INTSP .L1 A14,A0 ; |85| MVKL .S1 0x54442d18,A4 ; |85| MVKL .S1 0xc01921fb,A5 ; |85| MVKH .S1 0x54442d18,A4 ; |85| SPDP .S1 A0,A1:A0 ; |85| || B .S2 __divd ; |85| MVKL .S2 RL6,B3 ; |85| MV .L2X A0,B4 ; |85| MVKH .S1 0xc01921fb,A5 ; |85| MV .L2X A1,B5 ; |85| MVKH .S2 RL6,B3 ; |85| RL6: ; CALL OCCURS ; |85| B .S1 L16 ; |85| || INTSP .L2X A14,B4 ; |85| DPSP .L1 A5:A4,A0 ; |85| NOP 2 STW .D2T2 B4,*+SP(12) ; |85| STW .D2T1 A0,*+DP(_WAngleIncrement) ; |85| ; BRANCH OCCURS ; |85| ;** --------------------------------------------------------------------------* L15: .line 27 INTSP .L1 A14,A0 ; |87| MVKL .S1 0x54442d18,A4 ; |87| MVKL .S1 0x401921fb,A5 ; |87| MVKH .S1 0x54442d18,A4 ; |87| SPDP .S1 A0,A1:A0 ; |87| || B .S2 __divd ; |87| MVKL .S2 RL8,B3 ; |87| MV .L2X A0,B4 ; |87| MVKH .S1 0x401921fb,A5 ; |87| MV .L2X A1,B5 ; |87| MVKH .S2 RL8,B3 ; |87| RL8: ; CALL OCCURS ; |87| INTSP .L2X A14,B4 ; |87| DPSP .L1 A5:A4,A0 ; |87| NOP 2 STW .D2T2 B4,*+SP(12) ; |87| STW .D2T1 A0,*+DP(_WAngleIncrement) ; |87| ;** --------------------------------------------------------------------------* L16: .line 29 SHR .S2X A14,1,B10 ; |89| .line 30 STW .D2T2 B10,*+SP(16) ; |90| .line 31 STW .D2T1 A14,*+SP(20) ; |91| .line 34 LDW .D2T2 *+SP(4),B4 NOP 4 CMPGT .L2 B4,0,B0 ; |94| [!B0] B .S1 L22 ; |94| NOP 5 ; BRANCH OCCURS ; |94| ;** --------------------------------------------------------------------------* .line 37 LDW .D2T1 *+SP(4),A0 NOP 4 STW .D2T1 A0,*+SP(24) ; |97| .line 32 MVK .S1 0x1,A15 ; |92| ;** --------------------------------------------------------------------------* ;** BEGIN LOOP L17 ;** --------------------------------------------------------------------------* L17: .line 37 CMPGT .L1 A14,0,A1 ; |97| [!A1] B .S1 L21 ; |97| [ A1] ZERO .D2 B4 ; |97| [ A1] STW .D2T2 B4,*+SP(28) ; |97| NOP 3 ; BRANCH OCCURS ; |97| ;** --------------------------------------------------------------------------* ;** BEGIN LOOP L18 ;** --------------------------------------------------------------------------* L18: .line 42 CMPGT .L2 B10,0,B0 ; |102| [!B0] B .S1 L20 ; |102| [ B0] LDW .D2T1 *+SP(28),A3 [ B0] LDW .D2T1 *+SP(16),A0 NOP 3 ; BRANCH OCCURS ; |102| ;** --------------------------------------------------------------------------* NOP 1 ADD .D1 A0,A3,A0 MV .S1 A3,A0 || ADDAD .D1 A12,A0,A11 ADDAD .D1 A12,A0,A10 .line 44 MV .S1X B10,A0 ; |104| STW .D2T1 A0,*+SP(32) ; |104| .line 39 ZERO .D2 B11 ; |99| ;*----------------------------------------------------------------------------* ;* SOFTWARE PIPELINE INFORMATION ;* Disqualified loop: loop contains a call ;*----------------------------------------------------------------------------* L19: .line 44 LDW .D2T2 *+DP(_WAngleIncrement),B5 ; |104| INTSP .L2 B11,B4 ; |104| NOP 3 MPYSP .M2 B5,B4,B4 ; |104| NOP 1 .line 45 B .S1 _cos ; |105| MVKL .S2 RL10,B3 ; |105| SPDP .S2 B4,B13:B12 ; |105| NOP 1 MV .S1X B13,A5 ; |105| MVKH .S2 RL10,B3 ; |105| || MV .S1X B12,A4 ; |105| RL10: ; CALL OCCURS ; |105| DPSP .L1 A5:A4,A13 ; |105| .line 46 B .S1 _sin ; |106| MV .S1X B13,A5 ; |106| MVKL .S2 RL12,B3 ; |106| MV .S1X B12,A4 ; |106| MVKH .S2 RL12,B3 ; |106| NOP 1 RL12: ; CALL OCCURS ; |106| DPSP .L1 A5:A4,A0 ; |106| .line 48 LDW .D1T1 *A10,A5 ; |108| .line 49 LDW .D1T1 *+A10(4),A6 ; |109| .line 50 LDW .D1T1 *A11,A3 ; |110| NOP 3 .line 51 LDW .D1T1 *+A11(4),A4 ; |111| .line 53 ADDSP .L1 A3,A5,A7 ; |113| NOP 3 STW .D1T1 A7,*A10 ; |113| .line 54 ADDSP .L1 A4,A6,A7 ; |114| NOP 3 STW .D1T1 A7,*+A10(4) ; |114| .line 55 SUBSP .L1 A5,A3,A3 ; |115| .line 56 SUBSP .L1 A6,A4,A4 ; |116| NOP 2 .line 57 MPYSP .M1 A13,A3,A5 ; |117| MPYSP .M1 A0,A4,A6 ; |117| NOP 3 SUBSP .L1 A5,A6,A5 ; |117| NOP 3 STW .D1T1 A5,*A11 ; |117| .line 58 MPYSP .M1 A0,A3,A0 ; |118| MPYSP .M1 A13,A4,A4 ; |118| NOP 3 ADDSP .L1 A4,A0,A0 ; |118| NOP 3 STW .D1T1 A0,*+A11(4) ; |118| .line 62 ADD .S2X A15,B11,B11 ; |122| .line 60 ADD .D1 8,A10,A10 ; |120| .line 61 ADD .D1 8,A11,A11 ; |121| .line 63 LDW .D2T1 *+SP(32),A0 NOP 4 SUB .D1 A0,1,A1 [ A1] B .S1 L19 ; |123| SUB .D1 A0,1,A0 STW .D2T1 A0,*+SP(32) ; |123| NOP 3 ; BRANCH OCCURS ; |123| ;** --------------------------------------------------------------------------* L20: .line 64 LDW .D2T2 *+SP(28),B4 LDW .D2T2 *+SP(20),B5 NOP 4 ADD .D2 B5,B4,B4 ; |124| CMPLT .L1X B4,A14,A1 [ A1] B .S1 L18 ; |124| STW .D2T2 B4,*+SP(28) ; |124| NOP 4 ; BRANCH OCCURS ; |124| ;** --------------------------------------------------------------------------* L21: .line 65 SHR .S2 B10,1,B10 ; |125| .line 66 LDW .D2T1 *+SP(16),A0 NOP 4 SHR .S1 A0,1,A0 ; |126| STW .D2T1 A0,*+SP(16) ; |126| .line 67 LDW .D2T2 *+SP(20),B4 NOP 4 SHR .S2 B4,1,B4 ; |127| STW .D2T2 B4,*+SP(20) ; |127| .line 68 ADD .D1 A15,A15,A15 .line 70 LDW .D2T2 *+SP(24),B4 NOP 4 SUB .S1X B4,1,A1 [ A1] B .S1 L17 ; |130| SUB .D2 B4,1,B4 STW .D2T2 B4,*+SP(24) ; |130| NOP 3 ; BRANCH OCCURS ; |130| ;** --------------------------------------------------------------------------* L22: .line 73 B .S1 _BitReverseArray ; |133| LDW .D2T2 *+SP(4),B4 ; |133| MVKL .S2 RL14,B3 ; |133| MVKH .S2 RL14,B3 ; |133| MV .D1 A12,A4 ; |133| NOP 1 RL14: ; CALL OCCURS ; |133| .line 76 LDW .D2T2 *+SP(8),B4 ; |136| CMPGT .L1 A14,0,A0 ; |136| XOR .S1 1,A0,A0 ; |136| NOP 2 CMPEQ .L2 B4,0,B4 ; |136| OR .S2X A0,B4,B0 ; |136| [ B0] B .S1 L24 ; |136| NOP 5 ; BRANCH OCCURS ; |136| ;** --------------------------------------------------------------------------* .line 79 ;*----------------------------------------------------------------------------* ;* SOFTWARE PIPELINE INFORMATION ;* Disqualified loop: loop contains a call ;*----------------------------------------------------------------------------* L23: B .S1 __divf ; |139| LDW .D1T1 *A12,A4 || LDW .D2T2 *+SP(12),B4 ; |139| MVKL .S2 RL16,B3 ; |139| MVKH .S2 RL16,B3 ; |139| NOP 2 RL16: ; CALL OCCURS ; |139| STW .D1T1 A4,*A12 ; |139| .line 80 B .S1 __divf ; |140| LDW .D1T1 *+A12(4),A4 || LDW .D2T2 *+SP(12),B4 ; |140| MVKL .S2 RL18,B3 ; |140| MVKH .S2 RL18,B3 ; |140| NOP 2 RL18: ; CALL OCCURS ; |140| STW .D1T1 A4,*+A12(4) ; |140| .line 81 SUB .D1 A14,1,A1 [ A1] B .S1 L23 ; |141| ADD .D1 8,A12,A12 ; |141| SUB .S1 A14,1,A14 NOP 3 ; BRANCH OCCURS ; |141| ;** --------------------------------------------------------------------------* L24: .line 83 LDW .D2T1 *+SP(76),A15 ; |143| LDW .D2T2 *+SP(72),B12 ; |143| LDW .D2T2 *+SP(68),B11 ; |143| LDW .D2T2 *+SP(64),B10 ; |143| LDW .D2T2 *+SP(60),B3 ; |143| LDW .D2T1 *+SP(56),A14 ; |143| LDW .D2T1 *+SP(52),A13 ; |143| LDW .D2T1 *+SP(48),A12 ; |143| LDW .D2T1 *+SP(44),A11 ; |143| LDW .D2T1 *+SP(40),A10 ; |143| LDW .D2T2 *++SP(80),B13 ; |143| B .S2 B3 ; |143| NOP 5 ; BRANCH OCCURS ; |143| .endfunc 143,03c08fc00h,80 ;****************************************************************************** ;* UNDEFINED EXTERNAL REFERENCES * ;****************************************************************************** .global _pow .global _sin .global _cos .global __divd .global __divf ;*************************************************************** ;* TYPE INFORMATION * ;*************************************************************** .sym _Real, 0, 6, 13, 32 .stag $$fake0, 64 .member _Re, 0, 6, 8, 32 .member _Im, 32, 6, 8, 32 .eos .sym _Complex, 0, 8, 13, 64,$$fake0