;****************************************************************************** ;* TMS320C6x ANSI C Codegen Version 4.00 * ;* Date/Time created: Thu May 03 22:38:13 2001 * ;****************************************************************************** ;****************************************************************************** ;* GLOBAL FILE PARAMETERS * ;* * ;* Architecture : TMS320C671x * ;* Optimization : Enabled at level 3 * ;* Optimizing for : Speed * ;* Based on options: -o3, no -ms * ;* Endian : Little * ;* Interrupt Thrshld : Disabled * ;* Memory Model : Small * ;* Calls to RTS : Near * ;* Pipelining : Enabled * ;* Speculative Load : Disabled * ;* Memory Aliases : Presume are aliases (pessimistic) * ;* Debug Info : Debug * ;* * ;****************************************************************************** FP .set A15 DP .set B14 SP .set B15 .global $bss ; opt6x -v6710 -O3 c:\windows\TEMP\TI351577_2 c:\windows\TEMP\TI351577_4 .file "dss_dsk6211.c" .file "C:\ti\c6000\bios\include\std.h" .file "C:\ti\c6000\bios\include\log.h" .stag _LOG_Obj, 192 .member _bufend, 0, 14, 8, 32 .member _flag, 32, 14, 8, 32 .member _seqnum, 64, 14, 8, 32 .member _curptr, 96, 14, 8, 32 .member _lenmask, 128, 14, 8, 32 .member _bufbeg, 160, 14, 8, 32 .eos .sym _Uns, 0, 14, 13, 32 .sym _LOG_Handle, 0, 24, 13, 32,_LOG_Obj .sym _Int, 0, 4, 13, 32 .sym _Arg, 0, 4, 13, 32 .sym _String, 0, 18, 13, 32 .file "dss_dsk6211.c" .file "C:\ti\c6000\bios\include\log.h" .file "C:\ti\c6000\cgtools\include\c6x.h" .file "dss_dsk6211.c" .sect ".text" .global _patchOldBoard .sym _patchOldBoard,_patchOldBoard, 32, 2, 0 .func 224 ;****************************************************************************** ;* FUNCTION NAME: _patchOldBoard * ;* * ;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,B0,B1,B2,B3,B4,B5, * ;* B6,B7,B8,B9,SP * ;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,B0,B1,B2,B3,B4,B5, * ;* B6,B7,B8,B9,SP * ;* Local Frame Size : 8 Args + 0 Auto + 8 Save = 16 byte * ;****************************************************************************** _patchOldBoard: ;** --------------------------------------------------------------------------* .sym C$1,10, 24, 4, 32, _LOG_Obj .sym _multiplexer,0, 14, 4, 32 .sym _board_revision,20, 14, 4, 32 STW .D2T2 B3,*SP--(16) ; |224| STW .D2T1 A10,*+SP(12) ; |224| .line 7 ZERO .L1 A0 ; |230| MVKH .S1 0x90080000,A0 ; |230| LDW .D1T1 *A0,A0 ; |230| NOP 4 SHRU .S2X A0,29,B4 ; |230| CMPEQ .L2 B4,1,B0 ; |230| [ B0] B .S1 L1 ; |230| NOP 5 ; BRANCH OCCURS ; |230| ;** --------------------------------------------------------------------------* .line 25 B .S1 _LOG_printf ; |248| MVKL .S2 SL1+0,B5 ; |248| MVKL .S2 RL0,B3 ; |248| MVKH .S2 SL1+0,B5 ; |248| STW .D2T2 B4,*+SP(8) ; |248| || MVKL .S1 _trace,A4 ; |248| STW .D2T2 B5,*+SP(4) ; |248| || MVKH .S2 RL0,B3 ; |248| || MVKH .S1 _trace,A4 ; |248| RL0: ; CALL OCCURS ; |248| B .S1 L2 ; |248| NOP 5 ; BRANCH OCCURS ; |248| ;** --------------------------------------------------------------------------* L1: .line 12 MVKL .S2 _trace,B4 ; |235| MVKH .S2 _trace,B4 ; |235| MV .L1X B4,A10 ; |235| B .S1 _LOG_printf ; |235| MVKL .S2 RL2,B3 ; |235| MVKL .S2 SL2+0,B4 ; |235| MVK .S1 1,A0 ; |235| MVKH .S2 SL2+0,B4 ; |235| || STW .D2T1 A0,*+SP(8) ; |235| STW .D2T2 B4,*+SP(4) ; |235| || MV .L1 A10,A4 ; |235| || MVKH .S2 RL2,B3 ; |235| RL2: ; CALL OCCURS ; |235| .line 13 B .S1 _LOG_printf ; |236| MVKL .S1 SL3+0,A0 ; |236| MVKL .S2 RL4,B3 ; |236| MVKH .S1 SL3+0,A0 ; |236| STW .D2T1 A0,*+SP(4) ; |236| MV .L1 A10,A4 ; |236| || MVKH .S2 RL4,B3 ; |236| RL4: ; CALL OCCURS ; |236| .line 16 ZERO .L1 A0 ; |239| MVKH .S1 0x19c0000,A0 ; |239| LDW .D1T1 *A0,A0 ; |239| NOP 3 .line 22 ZERO .L2 B4 ; |245| SET .S1 A0,5,8,A0 ; |245| || MVKH .S2 0x19c0000,B4 ; |245| STW .D2T1 A0,*B4 ; |245| ;** --------------------------------------------------------------------------* L2: .line 28 LDW .D2T1 *+SP(12),A10 ; |251| LDW .D2T2 *++SP(16),B3 ; |251| NOP 4 B .S2 B3 ; |251| NOP 5 ; BRANCH OCCURS ; |251| .endfunc 251,000080400h,16 .sect ".text" .global _mcbsp0_write .sym _mcbsp0_write,_mcbsp0_write, 32, 2, 0 .func 67 ;****************************************************************************** ;* FUNCTION NAME: _mcbsp0_write * ;* * ;* Regs Modified : A0,A3,A4,A5,B0,B1,B2,B4,SP * ;* Regs Used : A0,A3,A4,A5,B0,B1,B2,B3,B4,SP * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;****************************************************************************** _mcbsp0_write: ;** --------------------------------------------------------------------------* .sym _out_data,4, 14, 17, 32 .sym _out_data,5, 14, 4, 32 .sym K$3,4, 14, 4, 32 .sym _temp,4, 14, 1, 32 SUB .L2 SP,8,SP ; |67| .line 2 MV .L1 A4,A5 ; |68| .line 5 MVKL .S1 0x18c0008,A0 ; |71| MVKH .S1 0x18c0008,A0 ; |71| LDW .D1T1 *A0,A0 ; |71| ZERO .L2 B4 ; |71| MVKH .S2 0x20000,B4 ; |71| NOP 2 AND .L2X B4,A0,B4 ; |71| STW .D2T2 B4,*+SP(4) ; |71| .line 6 LDW .D2T2 *+SP(4),B0 ; |72| NOP 4 [ B0] B .S1 L6 ; |72| NOP 5 ; BRANCH OCCURS ; |72| ;** --------------------------------------------------------------------------* .line 5 MVKL .S1 0x18c0008,A3 ; (P) |73| MVK .S2 0x1,B0 || MVKH .S1 0x18c0008,A3 ; (P) |73| [ B0] LDW .D1T1 *A3,A0 ; (P) ^ |73| ZERO .L1 A4 ; |71| MVKH .S1 0x20000,A4 ; |71| MV .L2 B0,B1 NOP 1 AND .L1 A4,A0,A3 ; (P) ^ |73| ;*----------------------------------------------------------------------------* ;* SOFTWARE PIPELINE INFORMATION ;* ;* Known Minimum Trip Count : 1 ;* Known Max Trip Count Factor : 1 ;* Loop Carried Dependency Bound(^) : 13 ;* Unpartitioned Resource Bound : 2 ;* Partitioned Resource Bound(*) : 3 ;* Resource Partition: ;* A-side B-side ;* .L units 0 0 ;* .S units 2 1 ;* .D units 1 2 ;* .M units 0 0 ;* .X cross paths 0 0 ;* .T address paths 2 1 ;* Long read paths 1 0 ;* Long write paths 0 0 ;* Logical ops (.LS) 1 0 (.L or .S unit) ;* Addition ops (.LSD) 0 4 (.L or .S or .D unit) ;* Bound(.L .S .LS) 2 1 ;* Bound(.L .S .D .LS .LSD) 2 3* ;* ;* Searching for software pipeline schedule at ... ;* ii = 13 Schedule found with 2 iterations in parallel ;* done ;* ;* Loop is interruptible ;* Collapsed epilog stages : 1 ;* Prolog not removed ;* Collapsed prolog stages : 0 ;* ;* Minimum required memory pad : 0 bytes ;* ;* Minimum safe trip count : 1 ;*----------------------------------------------------------------------------* ;* SETUP CODE ;* ;* MVK 0x1,B0 ;* MV B0,B1 ;* ;* SINGLE SCHEDULED ITERATION ;* ;* C24: ;* MVKL .S1 0x18c0008,A3 ; |73| ;* MVKH .S1 0x18c0008,A3 ; |73| ;* [ B0] LDW .D1T1 *A3,A0 ; ^ |73| ;* NOP 4 ;* AND .L1 A4,A0,A3 ; ^ |73| ;* [ B1] STW .D2T1 A3,*+SP(4) ; ^ |73| ;* [ B1] LDW .D2T2 *+SP(4),B2 ; ^ |74| ;* NOP 4 ;* [ B2] ZERO .L2 B0 ; ^ ;* [ B0] B .S2 C24 ; |74| ;* NOP 2 ;* MV .L2 B0,B4 ; Inserted to split a long life ;* MV .L2 B4,B4 ; Inserted to split a long life ;* MV .L2 B4,B1 ; Inserted to split a long life ;* ; BRANCH OCCURS ; |74| ;*----------------------------------------------------------------------------* L3: ; PIPED LOOP PROLOG ;** --------------------------------------------------------------------------* L4: ; PIPED LOOP KERNEL [ B1] STW .D2T1 A3,*+SP(4) ; ^ |73| [ B1] LDW .D2T2 *+SP(4),B2 ; ^ |74| NOP 3 MVKL .S1 0x18c0008,A3 ; @|73| [ B2] ZERO .L2 B0 ; ^ || MVKH .S1 0x18c0008,A3 ; @|73| [ B0] B .S2 L4 ; |74| || [ B0] LDW .D1T1 *A3,A0 ; @ ^ |73| NOP 2 MV .L2 B0,B4 ; Inserted to split a long life MV .L2 B4,B4 ; Inserted to split a long life MV .L2 B4,B1 ; Inserted to split a long life || AND .L1 A4,A0,A3 ; @ ^ |73| ;** --------------------------------------------------------------------------* L5: ; PIPED LOOP EPILOG ;** --------------------------------------------------------------------------* L6: .line 10 MVKL .S1 0x18c0004,A0 ; |76| MVKH .S1 0x18c0004,A0 ; |76| STW .D1T1 A5,*A0 ; |76| .line 11 B .S2 B3 ; |77| ADD .L2 8,SP,SP ; |77| NOP 4 ; BRANCH OCCURS ; |77| .endfunc 77,000000000h,8 .sect ".text" .global _mcbsp0_read .sym _mcbsp0_read,_mcbsp0_read, 46, 2, 0 .func 82 ;****************************************************************************** ;* FUNCTION NAME: _mcbsp0_read * ;* * ;* Regs Modified : A0,A3,A4,B0,B1,B2,B4,SP * ;* Regs Used : A0,A3,A4,B0,B1,B2,B3,B4,SP * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;****************************************************************************** _mcbsp0_read: ;** --------------------------------------------------------------------------* .sym _temp,4, 14, 1, 32 SUB .L2 SP,8,SP ; |82| .line 5 MVKL .S1 0x18c0008,A0 ; |86| MVKH .S1 0x18c0008,A0 ; |86| LDW .D1T1 *A0,A0 ; |86| NOP 4 AND .L1 2,A0,A0 ; |86| STW .D2T1 A0,*+SP(4) ; |86| .line 6 LDW .D2T2 *+SP(4),B0 ; |87| NOP 4 [ B0] B .S1 L10 ; |87| [!B0] MVKL .S1 0x18c0008,A3 ; (P) |88| [!B0] MVKH .S1 0x18c0008,A3 ; (P) |88| [!B0] MVK .S2 0x1,B0 NOP 2 ; BRANCH OCCURS ; |87| ;** --------------------------------------------------------------------------* [ B0] LDW .D1T1 *A3,A0 ; (P) ^ |88| MV .L2 B0,B1 NOP 3 AND .L1 2,A0,A3 ; (P) ^ |88| ;*----------------------------------------------------------------------------* ;* SOFTWARE PIPELINE INFORMATION ;* ;* Known Minimum Trip Count : 1 ;* Known Max Trip Count Factor : 1 ;* Loop Carried Dependency Bound(^) : 13 ;* Unpartitioned Resource Bound : 2 ;* Partitioned Resource Bound(*) : 3 ;* Resource Partition: ;* A-side B-side ;* .L units 0 0 ;* .S units 2 1 ;* .D units 1 2 ;* .M units 0 0 ;* .X cross paths 0 0 ;* .T address paths 2 1 ;* Long read paths 1 0 ;* Long write paths 0 0 ;* Logical ops (.LS) 1 0 (.L or .S unit) ;* Addition ops (.LSD) 0 4 (.L or .S or .D unit) ;* Bound(.L .S .LS) 2 1 ;* Bound(.L .S .D .LS .LSD) 2 3* ;* ;* Searching for software pipeline schedule at ... ;* ii = 13 Schedule found with 2 iterations in parallel ;* done ;* ;* Loop is interruptible ;* Collapsed epilog stages : 1 ;* Prolog not removed ;* Collapsed prolog stages : 0 ;* ;* Minimum required memory pad : 0 bytes ;* ;* Minimum safe trip count : 1 ;*----------------------------------------------------------------------------* ;* SETUP CODE ;* ;* MVK 0x1,B0 ;* MV B0,B1 ;* ;* SINGLE SCHEDULED ITERATION ;* ;* C51: ;* MVKL .S1 0x18c0008,A3 ; |88| ;* MVKH .S1 0x18c0008,A3 ; |88| ;* [ B0] LDW .D1T1 *A3,A0 ; ^ |88| ;* NOP 4 ;* AND .L1 2,A0,A3 ; ^ |88| ;* [ B1] STW .D2T1 A3,*+SP(4) ; ^ |88| ;* [ B1] LDW .D2T2 *+SP(4),B2 ; ^ |89| ;* NOP 4 ;* [ B2] ZERO .L2 B0 ; ^ ;* [ B0] B .S2 C51 ; |89| ;* NOP 2 ;* MV .L2 B0,B4 ; Inserted to split a long life ;* MV .L2 B4,B4 ; Inserted to split a long life ;* MV .L2 B4,B1 ; Inserted to split a long life ;* ; BRANCH OCCURS ; |89| ;*----------------------------------------------------------------------------* L7: ; PIPED LOOP PROLOG ;** --------------------------------------------------------------------------* L8: ; PIPED LOOP KERNEL [ B1] STW .D2T1 A3,*+SP(4) ; ^ |88| [ B1] LDW .D2T2 *+SP(4),B2 ; ^ |89| NOP 3 MVKL .S1 0x18c0008,A3 ; @|88| [ B2] ZERO .L2 B0 ; ^ || MVKH .S1 0x18c0008,A3 ; @|88| [ B0] B .S2 L8 ; |89| || [ B0] LDW .D1T1 *A3,A0 ; @ ^ |88| NOP 2 MV .L2 B0,B4 ; Inserted to split a long life MV .L2 B4,B4 ; Inserted to split a long life MV .L2 B4,B1 ; Inserted to split a long life || AND .L1 2,A0,A3 ; @ ^ |88| ;** --------------------------------------------------------------------------* L9: ; PIPED LOOP EPILOG ;** --------------------------------------------------------------------------* L10: .line 10 ZERO .L1 A0 ; |91| MVKH .S1 0x18c0000,A0 ; |91| LDW .D1T1 *A0,A0 ; |91| NOP 4 STW .D2T1 A0,*+SP(4) ; |91| .line 12 LDW .D2T1 *+SP(4),A4 ; |93| .line 13 B .S2 B3 ; |94| ADD .L2 8,SP,SP ; |94| NOP 4 ; BRANCH OCCURS ; |94| .endfunc 94,000000000h,8 .sect ".text" .global _mcbsp0_init .sym _mcbsp0_init,_mcbsp0_init, 32, 2, 0 .func 50 ;****************************************************************************** ;* FUNCTION NAME: _mcbsp0_init * ;* * ;* Regs Modified : A0,A3,B4,B5 * ;* Regs Used : A0,A3,B3,B4,B5 * ;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte * ;****************************************************************************** _mcbsp0_init: ;** --------------------------------------------------------------------------* .sym C$1,0, 14, 4, 32 .sym C$2,21, 14, 4, 32 .line 4 MVKL .S1 0x18c0008,A0 ; |53| MVKH .S1 0x18c0008,A0 ; |53| || ZERO .L2 B5 ; |53| STW .D1T2 B5,*A0 ; |53| .line 5 MVKL .S2 0x18c0024,B4 ; |54| MVKH .S2 0x18c0024,B4 ; |54| STW .D2T2 B5,*B4 ; |54| .line 8 MVKL .S1 0x18c000c,A3 ; |57| MVKH .S1 0x18c000c,A3 ; |57| MVKL .S1 0x10040,A0 ; |57| MVKH .S1 0x10040,A0 ; |57| STW .D1T1 A0,*A3 ; |57| .line 9 MVKL .S2 0x18c0010,B4 ; |58| MVKH .S2 0x18c0010,B4 ; |58| STW .D2T1 A0,*B4 ; |58| .line 12 MVKL .S1 0x18c0008,A0 ; |61| || MVKL .S2 0x10001,B4 ; |61| MVKH .S1 0x18c0008,A0 ; |61| || MVKH .S2 0x10001,B4 ; |61| STW .D1T2 B4,*A0 ; |61| .line 13 B .S2 B3 ; |62| NOP 5 ; BRANCH OCCURS ; |62| .endfunc 62,000000000h,0 .sect ".text" .global _codec_error .sym _codec_error,_codec_error, 32, 2, 0 .func 211 ;****************************************************************************** ;* FUNCTION NAME: _codec_error * ;* * ;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, * ;* B7,B8,B9,SP * ;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, * ;* B7,B8,B9,DP,SP * ;* Local Frame Size : 0 Args + 0 Auto + 4 Save = 4 byte * ;****************************************************************************** _codec_error: ;** --------------------------------------------------------------------------* .sym _id,4, 4, 17, 32 .sym _id,20, 4, 4, 32 STW .D2T2 B3,*SP--(8) ; |211| .line 2 MV .L2X A4,B4 ; |212| .line 3 B .S1 _LOG_event ; |213| LDW .D2T1 *+DP(_LOG_D_system),A4 ; |213| MVKL .S2 RL6,B3 ; |213| MVK .S2 0x9,B6 ; |213| MVKL .S1 SL4+0,A6 ; |213| MVKH .S2 RL6,B3 ; |213| || MVKH .S1 SL4+0,A6 ; |213| RL6: ; CALL OCCURS ; |213| ;** --------------------------------------------------------------------------* L11: .line 7 B .S1 L11 ; |217| NOP 5 ; BRANCH OCCURS ; |217| ;** --------------------------------------------------------------------------* .line 8 .endfunc 218,000080000h,8 .sect ".text" .global _codec_init .sym _codec_init,_codec_init, 32, 2, 0 .func 99 ;****************************************************************************** ;* FUNCTION NAME: _codec_init * ;* * ;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, * ;* B7,B8,B9,SP * ;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, * ;* B7,B8,B9,SP * ;* Local Frame Size : 0 Args + 4 Auto + 4 Save = 8 byte * ;****************************************************************************** _codec_init: ;** --------------------------------------------------------------------------* .sym _temp,4, 14, 1, 32 STW .D2T2 B3,*SP--(8) ; |99| .line 14 B .S1 _mcbsp0_read ; |112| MVKL .S2 RL8,B3 ; |112| MVKH .S2 RL8,B3 ; |112| NOP 3 RL8: ; CALL OCCURS ; |112| .line 15 B .S1 _mcbsp0_write ; |113| MVKL .S2 RL10,B3 ; |113| MVKH .S2 RL10,B3 ; |113| ZERO .L1 A4 ; |113| NOP 2 RL10: ; CALL OCCURS ; |113| .line 16 B .S1 _mcbsp0_read ; |114| MVKL .S2 RL12,B3 ; |114| MVKH .S2 RL12,B3 ; |114| NOP 3 RL12: ; CALL OCCURS ; |114| .line 17 B .S1 _mcbsp0_write ; |115| MVKL .S2 RL14,B3 ; |115| MVKH .S2 RL14,B3 ; |115| ZERO .L1 A4 ; |115| NOP 2 RL14: ; CALL OCCURS ; |115| .line 18 B .S1 _mcbsp0_read ; |116| MVKL .S2 RL16,B3 ; |116| MVKH .S2 RL16,B3 ; |116| NOP 3 RL16: ; CALL OCCURS ; |116| .line 19 B .S1 _mcbsp0_write ; |117| MVKL .S2 RL18,B3 ; |117| ZERO .L1 A4 ; |117| MVKH .S2 RL18,B3 ; |117| NOP 2 RL18: ; CALL OCCURS ; |117| .line 20 B .S1 _mcbsp0_read ; |118| MVKL .S2 RL20,B3 ; |118| MVKH .S2 RL20,B3 ; |118| NOP 3 RL20: ; CALL OCCURS ; |118| .line 21 B .S1 _mcbsp0_write ; |119| MVKL .S2 RL22,B3 ; |119| MVK .S1 0x1,A4 ; |119| MVKH .S2 RL22,B3 ; |119| NOP 2 RL22: ; CALL OCCURS ; |119| .line 22 B .S1 _mcbsp0_read ; |120| MVKL .S2 RL24,B3 ; |120| MVKH .S2 RL24,B3 ; |120| NOP 3 RL24: ; CALL OCCURS ; |120| .line 23 B .S1 _mcbsp0_write ; |121| MVKL .S2 RL26,B3 ; |121| MVKH .S2 RL26,B3 ; |121| MVK .S1 0x386,A4 ; |121| NOP 2 RL26: ; CALL OCCURS ; |121| .line 24 B .S1 _mcbsp0_read ; |122| MVKL .S2 RL28,B3 ; |122| MVKH .S2 RL28,B3 ; |122| NOP 3 RL28: ; CALL OCCURS ; |122| ;** --------------------------------------------------------------------------* .line 25 B .S1 _mcbsp0_write ; |123| MVKL .S2 RL30,B3 ; |123| MVKH .S2 RL30,B3 ; |123| ZERO .L1 A4 ; |123| NOP 2 RL30: ; CALL OCCURS ; |123| .line 26 B .S1 _mcbsp0_read ; |124| MVKL .S2 RL32,B3 ; |124| MVKH .S2 RL32,B3 ; |124| NOP 3 RL32: ; CALL OCCURS ; |124| .line 29 B .S1 _mcbsp0_write ; |127| MVKL .S2 RL34,B3 ; |127| MVKH .S2 RL34,B3 ; |127| ZERO .L1 A4 ; |127| NOP 2 RL34: ; CALL OCCURS ; |127| .line 30 B .S1 _mcbsp0_read ; |128| MVKL .S2 RL36,B3 ; |128| MVKH .S2 RL36,B3 ; |128| NOP 3 RL36: ; CALL OCCURS ; |128| .line 31 B .S1 _mcbsp0_write ; |129| MVKL .S2 RL38,B3 ; |129| MVKH .S2 RL38,B3 ; |129| ZERO .L1 A4 ; |129| NOP 2 RL38: ; CALL OCCURS ; |129| .line 32 B .S1 _mcbsp0_read ; |130| MVKL .S2 RL40,B3 ; |130| MVKH .S2 RL40,B3 ; |130| NOP 3 RL40: ; CALL OCCURS ; |130| .line 33 B .S1 _mcbsp0_write ; |131| MVKL .S2 RL42,B3 ; |131| MVK .S1 0x1,A4 ; |131| MVKH .S2 RL42,B3 ; |131| NOP 2 RL42: ; CALL OCCURS ; |131| .line 34 B .S1 _mcbsp0_read ; |132| MVKL .S2 RL44,B3 ; |132| MVKH .S2 RL44,B3 ; |132| NOP 3 RL44: ; CALL OCCURS ; |132| .line 35 B .S1 _mcbsp0_write ; |133| MVKL .S2 RL46,B3 ; |133| MVKH .S2 RL46,B3 ; |133| MVK .S1 0x306,A4 ; |133| NOP 2 RL46: ; CALL OCCURS ; |133| .line 36 B .S1 _mcbsp0_read ; |134| MVKL .S2 RL48,B3 ; |134| MVKH .S2 RL48,B3 ; |134| NOP 3 RL48: ; CALL OCCURS ; |134| .line 37 B .S1 _mcbsp0_write ; |135| MVKL .S2 RL50,B3 ; |135| MVKH .S2 RL50,B3 ; |135| ZERO .L1 A4 ; |135| NOP 2 RL50: ; CALL OCCURS ; |135| ;** --------------------------------------------------------------------------* .line 38 B .S1 _mcbsp0_read ; |136| MVKL .S2 RL52,B3 ; |136| MVKH .S2 RL52,B3 ; |136| NOP 3 RL52: ; CALL OCCURS ; |136| .line 41 B .S1 _mcbsp0_write ; |139| MVKL .S2 RL54,B3 ; |139| MVKH .S2 RL54,B3 ; |139| ZERO .L1 A4 ; |139| NOP 2 RL54: ; CALL OCCURS ; |139| .line 42 B .S1 _mcbsp0_read ; |140| MVKL .S2 RL56,B3 ; |140| MVKH .S2 RL56,B3 ; |140| NOP 3 RL56: ; CALL OCCURS ; |140| .line 43 B .S1 _mcbsp0_write ; |141| MVKL .S2 RL58,B3 ; |141| MVKH .S2 RL58,B3 ; |141| MVK .S1 0x1,A4 ; |141| NOP 2 RL58: ; CALL OCCURS ; |141| .line 44 B .S1 _mcbsp0_read ; |142| MVKL .S2 RL60,B3 ; |142| MVKH .S2 RL60,B3 ; |142| NOP 3 RL60: ; CALL OCCURS ; |142| .line 45 B .S1 _mcbsp0_write ; |143| MVKL .S2 RL62,B3 ; |143| MVKH .S2 RL62,B3 ; |143| MVK .S1 0x2330,A4 ; |143| NOP 2 RL62: ; CALL OCCURS ; |143| .line 46 B .S1 _mcbsp0_read ; |144| MVKL .S2 RL64,B3 ; |144| MVKH .S2 RL64,B3 ; |144| NOP 3 RL64: ; CALL OCCURS ; |144| STW .D2T1 A4,*+SP(4) ; |144| .line 47 B .S1 _mcbsp0_write ; |145| MVKL .S2 RL66,B3 ; |145| MVKH .S2 RL66,B3 ; |145| ZERO .L1 A4 ; |145| NOP 2 RL66: ; CALL OCCURS ; |145| .line 48 B .S1 _mcbsp0_read ; |146| MVKL .S2 RL68,B3 ; |146| MVKH .S2 RL68,B3 ; |146| NOP 3 RL68: ; CALL OCCURS ; |146| .line 49 B .S1 _mcbsp0_write ; |147| MVKL .S2 RL70,B3 ; |147| MVKH .S2 RL70,B3 ; |147| ZERO .L1 A4 ; |147| NOP 2 RL70: ; CALL OCCURS ; |147| .line 50 B .S1 _mcbsp0_read ; |148| MVKL .S2 RL72,B3 ; |148| MVKH .S2 RL72,B3 ; |148| NOP 3 RL72: ; CALL OCCURS ; |148| ;** --------------------------------------------------------------------------* .line 51 LDW .D2T2 *+SP(4),B4 ; |149| NOP 4 EXTU .S2 B4,24,24,B4 ; |149| CMPEQ .L2 B4,6,B0 ; |149| [!B0] B .S1 L13 ; |149| NOP 5 ; BRANCH OCCURS ; |149| ;** --------------------------------------------------------------------------* .line 56 B .S1 _mcbsp0_write ; |154| MVKL .S2 RL74,B3 ; |154| MVKH .S2 RL74,B3 ; |154| ZERO .L1 A4 ; |154| NOP 2 RL74: ; CALL OCCURS ; |154| .line 57 B .S1 _mcbsp0_read ; |155| MVKL .S2 RL76,B3 ; |155| MVKH .S2 RL76,B3 ; |155| NOP 3 RL76: ; CALL OCCURS ; |155| .line 58 B .S1 _mcbsp0_write ; |156| MVKL .S2 RL78,B3 ; |156| MVKH .S2 RL78,B3 ; |156| ZERO .L1 A4 ; |156| NOP 2 RL78: ; CALL OCCURS ; |156| .line 59 B .S1 _mcbsp0_read ; |157| MVKL .S2 RL80,B3 ; |157| MVKH .S2 RL80,B3 ; |157| NOP 3 RL80: ; CALL OCCURS ; |157| .line 60 B .S1 _mcbsp0_write ; |158| MVKL .S2 RL82,B3 ; |158| MVKH .S2 RL82,B3 ; |158| MVK .S1 0x1,A4 ; |158| NOP 2 RL82: ; CALL OCCURS ; |158| .line 61 B .S1 _mcbsp0_read ; |159| MVKL .S2 RL84,B3 ; |159| MVKH .S2 RL84,B3 ; |159| NOP 3 RL84: ; CALL OCCURS ; |159| .line 62 B .S1 _mcbsp0_write ; |160| MVKL .S2 RL86,B3 ; |160| MVK .S1 0x400,A4 ; |160| MVKH .S2 RL86,B3 ; |160| NOP 2 RL86: ; CALL OCCURS ; |160| .line 63 B .S1 _mcbsp0_read ; |161| MVKL .S2 RL88,B3 ; |161| MVKH .S2 RL88,B3 ; |161| NOP 3 RL88: ; CALL OCCURS ; |161| .line 64 B .S1 _mcbsp0_write ; |162| MVKL .S2 RL90,B3 ; |162| MVKH .S2 RL90,B3 ; |162| ZERO .L1 A4 ; |162| NOP 2 RL90: ; CALL OCCURS ; |162| .line 65 B .S1 _mcbsp0_read ; |163| MVKL .S2 RL92,B3 ; |163| MVKH .S2 RL92,B3 ; |163| NOP 3 RL92: ; CALL OCCURS ; |163| .line 68 B .S1 _mcbsp0_write ; |166| MVKL .S2 RL94,B3 ; |166| MVKH .S2 RL94,B3 ; |166| ZERO .L1 A4 ; |166| NOP 2 RL94: ; CALL OCCURS ; |166| ;** --------------------------------------------------------------------------* .line 69 B .S1 _mcbsp0_read ; |167| MVKL .S2 RL96,B3 ; |167| MVKH .S2 RL96,B3 ; |167| NOP 3 RL96: ; CALL OCCURS ; |167| .line 70 B .S1 _mcbsp0_write ; |168| MVKL .S2 RL98,B3 ; |168| MVKH .S2 RL98,B3 ; |168| MVK .S1 0x1,A4 ; |168| NOP 2 RL98: ; CALL OCCURS ; |168| .line 71 B .S1 _mcbsp0_read ; |169| MVKL .S2 RL100,B3 ; |169| MVKH .S2 RL100,B3 ; |169| NOP 3 RL100: ; CALL OCCURS ; |169| .line 72 B .S1 _mcbsp0_write ; |170| MVKL .S2 RL102,B3 ; |170| MVKH .S2 RL102,B3 ; |170| MVK .S1 0x2430,A4 ; |170| NOP 2 RL102: ; CALL OCCURS ; |170| .line 73 B .S1 _mcbsp0_read ; |171| MVKL .S2 RL104,B3 ; |171| MVKH .S2 RL104,B3 ; |171| NOP 3 RL104: ; CALL OCCURS ; |171| STW .D2T1 A4,*+SP(4) ; |171| .line 74 B .S1 _mcbsp0_write ; |172| MVKL .S2 RL106,B3 ; |172| MVKH .S2 RL106,B3 ; |172| ZERO .L1 A4 ; |172| NOP 2 RL106: ; CALL OCCURS ; |172| .line 75 B .S1 _mcbsp0_read ; |173| MVKL .S2 RL108,B3 ; |173| MVKH .S2 RL108,B3 ; |173| NOP 3 RL108: ; CALL OCCURS ; |173| .line 76 B .S1 _mcbsp0_write ; |174| MVKL .S2 RL110,B3 ; |174| ZERO .L1 A4 ; |174| MVKH .S2 RL110,B3 ; |174| NOP 2 RL110: ; CALL OCCURS ; |174| .line 77 B .S1 _mcbsp0_read ; |175| MVKL .S2 RL112,B3 ; |175| MVKH .S2 RL112,B3 ; |175| NOP 3 RL112: ; CALL OCCURS ; |175| .line 78 LDW .D2T2 *+SP(4),B4 ; |176| NOP 4 EXTU .S2 B4,24,24,B0 ; |176| [ B0] B .S1 L12 ; |176| NOP 5 ; BRANCH OCCURS ; |176| ;** --------------------------------------------------------------------------* .line 83 B .S1 _mcbsp0_write ; |181| MVKL .S2 RL114,B3 ; |181| MVKH .S2 RL114,B3 ; |181| ZERO .L1 A4 ; |181| NOP 2 RL114: ; CALL OCCURS ; |181| .line 84 B .S1 _mcbsp0_read ; |182| MVKL .S2 RL116,B3 ; |182| MVKH .S2 RL116,B3 ; |182| NOP 3 RL116: ; CALL OCCURS ; |182| .line 85 B .S1 _mcbsp0_write ; |183| MVKL .S2 RL118,B3 ; |183| MVKH .S2 RL118,B3 ; |183| ZERO .L1 A4 ; |183| NOP 2 RL118: ; CALL OCCURS ; |183| .line 86 B .S1 _mcbsp0_read ; |184| MVKL .S2 RL120,B3 ; |184| MVKH .S2 RL120,B3 ; |184| NOP 3 RL120: ; CALL OCCURS ; |184| .line 87 B .S1 _mcbsp0_write ; |185| MVKL .S2 RL122,B3 ; |185| MVKH .S2 RL122,B3 ; |185| MVK .S1 0x1,A4 ; |185| NOP 2 RL122: ; CALL OCCURS ; |185| .line 88 B .S1 _mcbsp0_read ; |186| MVKL .S2 RL124,B3 ; |186| MVKH .S2 RL124,B3 ; |186| NOP 3 RL124: ; CALL OCCURS ; |186| .line 89 B .S1 _mcbsp0_write ; |187| MVKL .S2 RL126,B3 ; |187| MVK .S1 0x502,A4 ; |187| MVKH .S2 RL126,B3 ; |187| NOP 2 RL126: ; CALL OCCURS ; |187| .line 90 B .S1 _mcbsp0_read ; |188| MVKL .S2 RL128,B3 ; |188| MVKH .S2 RL128,B3 ; |188| NOP 3 RL128: ; CALL OCCURS ; |188| .line 91 B .S1 _mcbsp0_write ; |189| MVKL .S2 RL130,B3 ; |189| MVKH .S2 RL130,B3 ; |189| ZERO .L1 A4 ; |189| NOP 2 RL130: ; CALL OCCURS ; |189| .line 92 B .S1 _mcbsp0_read ; |190| MVKL .S2 RL132,B3 ; |190| MVKH .S2 RL132,B3 ; |190| NOP 3 RL132: ; CALL OCCURS ; |190| .line 95 B .S1 _mcbsp0_write ; |193| MVKL .S2 RL134,B3 ; |193| MVKH .S2 RL134,B3 ; |193| ZERO .L1 A4 ; |193| NOP 2 RL134: ; CALL OCCURS ; |193| ;** --------------------------------------------------------------------------* .line 96 B .S1 _mcbsp0_read ; |194| MVKL .S2 RL136,B3 ; |194| MVKH .S2 RL136,B3 ; |194| NOP 3 RL136: ; CALL OCCURS ; |194| .line 97 B .S1 _mcbsp0_write ; |195| MVKL .S2 RL138,B3 ; |195| MVKH .S2 RL138,B3 ; |195| MVK .S1 0x1,A4 ; |195| NOP 2 RL138: ; CALL OCCURS ; |195| .line 98 B .S1 _mcbsp0_read ; |196| MVKL .S2 RL140,B3 ; |196| MVKH .S2 RL140,B3 ; |196| NOP 3 RL140: ; CALL OCCURS ; |196| .line 99 B .S1 _mcbsp0_write ; |197| MVKL .S2 RL142,B3 ; |197| MVKH .S2 RL142,B3 ; |197| MVK .S1 0x2530,A4 ; |197| NOP 2 RL142: ; CALL OCCURS ; |197| .line 100 B .S1 _mcbsp0_read ; |198| MVKL .S2 RL144,B3 ; |198| MVKH .S2 RL144,B3 ; |198| NOP 3 RL144: ; CALL OCCURS ; |198| STW .D2T1 A4,*+SP(4) ; |198| .line 101 B .S1 _mcbsp0_write ; |199| MVKL .S2 RL146,B3 ; |199| MVKH .S2 RL146,B3 ; |199| ZERO .L1 A4 ; |199| NOP 2 RL146: ; CALL OCCURS ; |199| .line 102 B .S1 _mcbsp0_read ; |200| MVKL .S2 RL148,B3 ; |200| MVKH .S2 RL148,B3 ; |200| NOP 3 RL148: ; CALL OCCURS ; |200| .line 103 B .S1 _mcbsp0_write ; |201| MVKL .S2 RL150,B3 ; |201| ZERO .L1 A4 ; |201| MVKH .S2 RL150,B3 ; |201| NOP 2 RL150: ; CALL OCCURS ; |201| .line 104 B .S1 _mcbsp0_read ; |202| MVKL .S2 RL152,B3 ; |202| MVKH .S2 RL152,B3 ; |202| NOP 3 RL152: ; CALL OCCURS ; |202| .line 105 LDW .D2T2 *+SP(4),B4 ; |203| NOP 4 EXTU .S2 B4,24,25,B4 ; |203| SHL .S2 B4,1,B4 ; |203| CMPEQ .L2 B4,2,B0 ; |203| [ B0] B .S1 L14 ; |203| NOP 5 ; BRANCH OCCURS ; |203| ;** --------------------------------------------------------------------------* ;*** ; the preceding call never returns .line 106 B .S1 _codec_error ; |204| MVKL .S2 RL154,B3 ; |204| MVKH .S2 RL154,B3 ; |204| MVK .S1 0x5,A4 ; |204| NOP 2 RL154: ; CALL OCCURS ; |204| ;** --------------------------------------------------------------------------* L12: ;*** ; the preceding call never returns .line 79 B .S1 _codec_error ; |177| MVKL .S2 RL156,B3 ; |177| MVKH .S2 RL156,B3 ; |177| MVK .S1 0x4,A4 ; |177| NOP 2 RL156: ; CALL OCCURS ; |177| ;** --------------------------------------------------------------------------* L13: ;*** ; the preceding call never returns .line 52 B .S1 _codec_error ; |150| MVKL .S2 RL158,B3 ; |150| MVKH .S2 RL158,B3 ; |150| MVK .S1 0x3,A4 ; |150| NOP 2 RL158: ; CALL OCCURS ; |150| ;** --------------------------------------------------------------------------* L14: .line 108 LDW .D2T2 *++SP(8),B3 ; |206| NOP 4 B .S2 B3 ; |206| NOP 5 ; BRANCH OCCURS ; |206| .endfunc 206,000080000h,8 .sect ".text" .global _DSS_init .sym _DSS_init,_DSS_init, 32, 2, 0 .func 34 ;****************************************************************************** ;* FUNCTION NAME: _DSS_init * ;* * ;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, * ;* B7,B8,B9,SP * ;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, * ;* B7,B8,B9,SP * ;* Local Frame Size : 0 Args + 0 Auto + 4 Save = 4 byte * ;****************************************************************************** _DSS_init: ;** --------------------------------------------------------------------------* .sym C$1,0, 14, 4, 32 .sym C$2,3, 14, 4, 32 ; >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> ENTERING mcbsp0_init() ; <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< LEAVING mcbsp0_init() STW .D2T2 B3,*SP--(8) ; |34| .line 4 B .S1 _patchOldBoard ; |37| MVKL .S2 RL160,B3 ; |37| MVKH .S2 RL160,B3 ; |37| NOP 3 RL160: ; CALL OCCURS ; |37| .line 6 MVKL .S2 0x18c0008,B4 ; |39| MVKH .S2 0x18c0008,B4 ; |39| || ZERO .L1 A3 ; |39| STW .D2T1 A3,*B4 ; |39| MVKL .S1 0x18c0024,A0 ; |39| MVKH .S1 0x18c0024,A0 ; |39| STW .D1T1 A3,*A0 ; |39| MVKL .S1 0x10040,A0 ; |39| || MVKL .S2 0x18c000c,B4 ; |39| MVKH .S1 0x10040,A0 ; |39| || MVKH .S2 0x18c000c,B4 ; |39| STW .D2T1 A0,*B4 ; |39| MVKL .S2 0x18c0010,B4 ; |39| MVKH .S2 0x18c0010,B4 ; |39| STW .D2T1 A0,*B4 ; |39| MVKL .S1 0x10001,A3 ; |39| MVKH .S1 0x10001,A3 ; |39| MVKL .S1 0x18c0008,A0 ; |39| MVKH .S1 0x18c0008,A0 ; |39| STW .D1T1 A3,*A0 ; |39| .line 8 B .S1 _codec_init ; |41| MVKL .S2 RL162,B3 ; |41| MVKH .S2 RL162,B3 ; |41| NOP 3 RL162: ; CALL OCCURS ; |41| .line 11 MVC .S2 IER,B4 ; |44| SET .S2 B4,11,11,B4 ; |44| MVC .S2 B4,IER ; |44| .line 12 LDW .D2T2 *++SP(8),B3 ; |45| NOP 4 B .S2 B3 ; |45| NOP 5 ; BRANCH OCCURS ; |45| .endfunc 45,000080000h,8 ;****************************************************************************** ;* STRINGS * ;****************************************************************************** .sect ".const" SL1: .string "Board is revision %d - 6711 DSK",0 SL2: .string "Board is revision %d - 6211 DSK",0 SL3: .string "Modifying Interrupt Mux for Silicon Errata",0 SL4: .string "Error setting up register %d",0 ;****************************************************************************** ;* UNDEFINED EXTERNAL REFERENCES * ;****************************************************************************** .global _LOG_event .global _LOG_printf .global _LOG_D_system .global _trace